The present invention relates to an apparatus for analyzing lines of sequential binary data which lines of data if viewed together form a two dimensional image array. The binary data may be formed initially by scanning an object with a scanning apparatus in a plurality of parallel scans. The binary data is representative of features present on the object
When it is desired to process binary data derived from a scanned object or the like, it is preferable to represent the features present therein by the smallest possible amount of data. This reduces the required memory capacity where the data is subsequently processed by computer and also reduces processing time, since the amount of data to be processed is minimal.
One system for producing lines of sequential binary data for analyzing the electrical conductor pattern on a circuit board is disclosed in U.S. Pat. No. 4,152,723 in the names of Donald H. McMahon and Colin G. Whitney. In that system, a beam of light scans over the surface of the circuit board in sequential parallel scans to illuminate the conductors (comprising the pattern) and the insulating substrate on which they are disposed. When the beam is incident on an exposed portion of the insulating substrate, a fluorescent emission therefrom is detected and a binary signal having a first state is generated by the apparatus. When the beam is incident on a conductor, no fluorescent emission results and the apparatus produces a binary signal of a second state complementary to the first state. By synchronizing the scans of the beam with the binary signals produced by the apparatus, lines of sequential binary data representative of the conductor patterns on the circuit board are generated.
Such an apparatus is capable of producing a vast amount of data. For example, where the scanning beam has a one mil resolution, a total of 1.6 billion bits of data are generated by the scanning apparatus when scanning the entire surface of a forty inch square circuit board.
Such a large amount of data is not only representative of the real conductor pattern of the board, but also includes false data resulting from sources of error such as optical noise, nonuniform motion of the scanner caused by bearing tolerances (bearing noise), and problems associated with image quantization. Bearing noise in the scanner system results in a mechanical shift in scanner position which gives the appearance of a jog or corner in the conducting pattern of the board where in fact there is no such jog. Image quantization is the operation of assigning a discrete binary value to each of the signals formed by the operation of the scanning apparatus. Due to limits of resolution, the scanning beam at a given point in time may fall upon an edge of a conductor such that only a portion of the beam is incident on the metal while another portion is incident upon the substrate. At such an occurrence only one binary value will be assigned representing an illuminated portion of the circuit board comprising both conductor and substrate. Also, since the fluorescent emission detected by the scanning apparatus is at a very low level, the presence of optical or electrical noise may cause the scanning apparatus to generate either one binary signal level or its complement without regard to the actual nature of the portion of the circuit board being scanned
A system for processing lines of sequential binary data representive of conductors present when an object is scanned is disclosed U.S. Pat. No. 4,300,122 in the name of Donald H. McMahon. McMahon discloses an apparatus comprising a smoothing circuit which is operative to form and examine a 3.times.3 array of binary signals which can be thought of as chosen from portions of adjacent rows and columns of a two dimensional image array, which two dimensional array would be formed by viewing together a plurality of lines of sequential binary signals generated by a scanning apparatus. The smoothing circuit assigns a binary value to the center signal location of the 3.times.3 array based upon whether the total number of adjacent signals in the 3.times.3 array having a given binary value exceeds a predetermined number. This smoothing operation is performed for a 3.times.3 group of signals with each new binary signal received from the scanning apparatus. The signals at the center signal location of the 3.times.3 array with newly assigned binary values are provided in sequence to a coding circuit. The assigned binary signals representing smoothed data, if viewed together provide a two dimensional, smoothed image array of binary data.
The apparatus of McMahon is further capable of reducing the vast amount of data generated, as described above, by characterizing the conductor pattern on the surface of the board as a plurality of conductor/substrate corner features of predetermined types. Each corner feature is assigned a corner code by a coding circuit of the apparatus.
McMahon's coding circuit is operative to arrange the assigned binary valued center signals into 2.times.2 matrices formed from portions of adjacent rows and columns of the smoothed image array and to examine each matrix to detect therein one of several possible binary signal patterns each of which represents a different one of the plurality of conductor/substrate corner features. In the preferred embodiment, there are eight discrete patterns used for characterizing the conductor/substrate corner features on the circuit board.
Errors inherent in a scanning system such as those errors described earlier will cause the conductor pattern on the circuit board to be characterized in some places as comprising extra corner features occurring as one or more adjacent corner feature pairs where in fact only one or no corner feature is present. These extra corner features are recognized and eliminated by the apparatus as taught by McMahon.
In the data processing apparatus of the above identified McMahon patent application, one or more shift registers are required by both the smoothing circuit and coding circuit to form the 3.times.3 and 2.times.2 arrays of data. These shift registers are required to have a capacity equal to the number of data points in each scan line. Optical scanning of large circuit boards produces shift line scans containing thirty thousand bits or more. Hence, the design and management of the shift registers become an important factor in the success of the processing apparatus in reducing the burden of processing large amounts of data.
In the above identified McMahon application, the operations of generating the corner codes and then eliminating erroneous, redundant adjacent corner features are done sequentially. It is desirable to accomplish these tasks as quickly as possible without increasing complexity. This will further reduce processing time.
It is also desirable to monitor the width of conductors and the width of spaces between parallel and spaced apart conductors (hereinafter called space strips) present on the circuit board and to generate an error signal if the widths vary from specification.
The majority logic used with the smoothing circuits of the McMahon application works well but has a tendency to degrade resolution of the image. Other improved means for smoothing data without degradation to the image resolution is desirable.